Title :
Memory array microarchitecture: Algorithmic techniques for density and performance enhancment
Author :
Berman, Amit ; Birk, Yitzhak
Author_Institution :
Dept. of Electr. Eng., Technion - Israel Inst. of Technol., Haifa, Israel
Abstract :
We provide an overview of our recently proposed novel architectures for enhancing memory density and performance. Constrained coding is used for density enhancement or endurance improvement by way of inter-cell interference mitigation, and speculative early sensing with guaranteed error detection accelerates memory access.
Keywords :
DRAM chips; SRAM chips; error detection codes; interference suppression; memory architecture; 3D DRAM; ST SRAM; algorithmic techniques; constrained coding; error detection codes; intercell interference mitigation; memory array microarchitecture; memory density enhancement; Arrays; Encoding; Flash memory; Interference; Microprocessors; Sensors;
Conference_Titel :
Electrical & Electronics Engineers in Israel (IEEEI), 2012 IEEE 27th Convention of
Conference_Location :
Eilat
Print_ISBN :
978-1-4673-4682-5
DOI :
10.1109/EEEI.2012.6377003
