DocumentCode :
2457229
Title :
About the FPGA implementation of a genetic algorithm for solving Sudoku puzzles
Author :
Thirer, Nonel
Author_Institution :
HIT - Holon Inst. of Technol. Holon, Holon, Israel
fYear :
2012
fDate :
14-17 Nov. 2012
Firstpage :
1
Lastpage :
3
Abstract :
In the last years, a number of papers present algorithms for solving and generating Sudoku puzzles. Some studies test and confirm the possibility to use the genetic algorithm (GA) for solving and rating the Sudoku puzzles. The results are that GA can solve Sudoku puzzles, but not very effectively. Other studies test the possibility of a FPGA implementation of a "Sudoku solver" algorithm and "brute-force" methods are used due to excessive resource requirement for the implementations of other algorithms. Our paper analyzes the possibility of a FPGA implementation of the GA for solving the puzzles. The paper presents some possible adaptations of the general GA algorithm, concerning the population and chromosome definitions, crossover and mutation phases and fitness function calculation for this FPGA implementation.
Keywords :
field programmable gate arrays; genetic algorithms; parallel processing; pipeline processing; random number generation; FPGA implementation; GA algorithm; brute- force method; crossover phases; fitness function calculation; genetic algorithm; mutation phases; parallel processing method; pipeline processing; pseudo random binary number generator; sudoku puzzles; sudoku solver algorithm; Biological cells; Field programmable gate arrays; Genetic algorithms; Hardware; Pipelines; Sociology; Statistics; FPGA Implementation; Genetic Algorithm; Sudoku puzzles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical & Electronics Engineers in Israel (IEEEI), 2012 IEEE 27th Convention of
Conference_Location :
Eilat
Print_ISBN :
978-1-4673-4682-5
Type :
conf
DOI :
10.1109/EEEI.2012.6377058
Filename :
6377058
Link To Document :
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