DocumentCode
2457649
Title
Synchronizing distributed state machines in a coarse grain reconfigurable architecture
Author
Malik, Omer ; Hemani, Ahmed
Author_Institution
Sch. of ICT, R. Inst. of Technol. (KTH), Stockholm, Sweden
fYear
2011
fDate
Oct. 31 2011-Nov. 2 2011
Firstpage
128
Lastpage
135
Abstract
This work presents methodology for synchronizing distributed FSMs (Finite State Machines) which are generated while implementing different algorithms on a coarse grain reconfigurable architecture. These FSMs interact with each other while executing algorithms and they are dependent upon each other; thus they need to be synchronized with each other for performing correct execution. The algorithms presented in this paper makes appropriate use of different strategies available for synchronizing these FSMs. The tool hides all sorts of low level details from the Programmer. It lets the designer focus on the details of algorithm (at higher level of abstraction) and cycle by cycle timings are resolved automatically.
Keywords
finite state machines; reconfigurable architectures; synchronisation; coarse grain reconfigurable architecture; coarse grain reconfigurable resource array; cycle by cycle timings; distributed FSM; distributed finite state machines; dynamically reconfigurable resource array; Algorithm design and analysis; Delay; Digital signal processing; Fabrics; Parallel processing; Registers; Synchronization; Distributed FSMs; System Level Synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
System on Chip (SoC), 2011 International Symposium on
Conference_Location
Tampere
Print_ISBN
978-1-4577-0671-4
Electronic_ISBN
978-1-4577-0670-7
Type
conf
DOI
10.1109/ISSOC.2011.6089690
Filename
6089690
Link To Document