Title :
On-chip inductance models: 3D or not 3D?
Author :
Lin, Tao ; Beattie, Michael W. ; Pileggi, Lawrence T.
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
Full 3D lumped partial inductance models usually contain a tremendous amount of forward coupling terms. To reduce the complexity of simulation and analysis, a simplified model that excludes the forward coupling terms is often adopted in practice. This paper addresses the question whether ignoring forward couplings is always an acceptable choice or if full 3D models are necessary in certain cases. We show that the significance of the forward coupling inductance depends on various aspects of the design
Keywords :
circuit simulation; error analysis; inductance; integrated circuit interconnections; integrated circuit modelling; 3D models; dipole effect; forward coupling; lumped partial inductance models; on-chip interconnects; parallel coplanar structure; return paths; Analytical models; Automatic testing; Capacitance; Clocks; Computational modeling; Conductors; Design automation; Inductance; Performance analysis; Wires;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-1471-5
DOI :
10.1109/DATE.2002.998500
