Title :
Segmented 8-bit current-steering Digital to Analog Converter
Author :
Mathurkar, Piyush ; Mali, Madan
Author_Institution :
Dept. Electron. & Telecommun., Sinhgad Coll. of Eng., Pune, India
Abstract :
Current steering Digital to Analog Converter (DAC) is architecture with advantages of high conversion rate, linearity and constant output impedance. A Segmented current steering DAC to improve dynamic performance is presented in this paper. To demonstrate the technique, 8 bit CMOS DAC is designed and layout is prepared in 90 nm technology. Computation of Integral Non Linearity (INL) and Differential Non Linearity (DNL) performance parameters is done. Chip consumes 57 mW and core area of 5483 (μm)2.
Keywords :
CMOS integrated circuits; digital-analogue conversion; integrated circuit layout; CMOS DAC layout design; DNL; INL; constant output impedance; differential nonlinearity; integral non linearity; power 57 mW; segmented current-steering digital to analog converter; size 90 nm; word length 8 bit; CMOS integrated circuits; Computer architecture; Delays; Latches; Linearity; Power demand; Switches; Current steering; Differential Non Linearity; Digital-to-Analog Converter(DAC); Integral Non Linearity; Low power;
Conference_Titel :
Pervasive Computing (ICPC), 2015 International Conference on
Conference_Location :
Pune
DOI :
10.1109/PERVASIVE.2015.7087130
