DocumentCode :
2459452
Title :
Constraints Assisted Modeling and Validation in Metropolis Framework
Author :
Yang, Guang ; Hsieh, Harry ; Chen, Xi ; Balarin, Felice ; Sangiovanni-Vincentelli, A.
Author_Institution :
Univ. of California, Berkeley, CA
fYear :
2006
fDate :
Oct. 29 2006-Nov. 1 2006
Firstpage :
1469
Lastpage :
1474
Abstract :
This paper focuses on quantitative constraints specified with logic of constraints (LOC) and coordination constraints with linear temporal logic (LTL) that are used in the specification, modeling, and validation of heterogeneous embedded system design. Quantity annotation is the principal approach for modeling performance information in Metropolis, our experiment platform. Quantitative constraints are then used to enforce and to refine simulation. They can also be used in synthesis settings especially for deciding system level parameters such as scheduling and hardware-software partitioning. Similarly, we utilize LTL in Metropolis to quickly refine the system behavior especially process coordinations. On the validation aspect, LOC and LTL are also used to specify assertions for simulation and for formal verification. We demonstrate our approach with a multimedia example from the industry.
Keywords :
constraint handling; formal specification; scheduling; temporal logic; constraints assisted modeling; hardware-software partitioning; linear temporal logic; logic of constraints; scheduling; Analytical models; Design methodology; Embedded system; Formal verification; Job shop scheduling; Lab-on-a-chip; Laboratories; Logic design; Power system modeling; Refining;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2006. ACSSC '06. Fortieth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
1-4244-0784-2
Electronic_ISBN :
1058-6393
Type :
conf
DOI :
10.1109/ACSSC.2006.355002
Filename :
4176812
Link To Document :
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