DocumentCode
2459543
Title
Hierarchical Star: An Optimal NoC Topology for High-Performance SoC Design
Author
Song, Zhaohui ; Ma, Guangsheng ; Song, Dalei
Author_Institution
Harbin Eng. Univ., Harbin
fYear
2008
fDate
18-20 Oct. 2008
Firstpage
158
Lastpage
163
Abstract
An optimal network-on-chip (NoC) topology, hierarchical star topology, that uses the star graphs as building blocks is presented for high-performance system-on-chip (SoC) Design. Its topological properties are compared with the topologies in the same category in terms of various performance metrics including diameter, cost, fault tolerance, fault diameter etc. It has been shown that the hierarchical star topology is an optimal NoC topology. Simultaneously, popular and interesting topologies are compared in practical terms of energy consumption and area cost. Considering the energy and area cost together, the hierarchical star topology is the most energy-efficient and cost-effective topology.
Keywords
logic design; network synthesis; network topology; network-on-chip; hierarchical star topology; high-performance SoC design; network-on-chip topology; optimal NoC topology; star graphs; Bidirectional control; Costs; Design engineering; Energy consumption; Fault tolerance; Hypercubes; Network topology; Network-on-a-chip; Power engineering and energy; Power engineering computing;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer and Computational Sciences, 2008. IMSCCS '08. International Multisymposiums on
Conference_Location
Shanghai
Print_ISBN
978-0-7695-3430-5
Type
conf
DOI
10.1109/IMSCCS.2008.38
Filename
4760315
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