Fabrication of 60-nm plasma doped CMOS transistors

As pulsed plasma doping continues to emerge as a viable alternative to beamline ion implantation for ultra-shallow junction fabrication, the source-drain extensions of highly advanced pMOS and nMOS transistors (60nm gate length) are doped using pulsed plasma doping derived from boron trifluoride and arsine starting materials. The device performance is compared directly to that of beamline ion implantation. The functionality of 60nm transistors is only achieved when using the plasma doping processes as short-channel effect is significantly improved and clearly demonstrates its benefits over standard ion implantation.