DocumentCode :
24603
Title :
Heterogeneous Multi-Core System, synchronized by a Petri Processor on FPGA
Author :
Pereyra, Marcelo ; Gallia, N. ; Alasia, M. ; Micolini, Orlando
Author_Institution :
FCEFyN, Univ. Nac. de Cordoba, Córdoba, Argentina
Volume :
11
Issue :
1
fYear :
2013
fDate :
Feb. 2013
Firstpage :
218
Lastpage :
223
Abstract :
This report describes the development of a hardware mechanism to improve synchronization in a multicore architecture, using Petri´s formalisms. A module that interfaces with two Microblaze processors is developed. Then it is implemented in a FPGA, thus constituting an heterogeneous multicore system with synchronization capability by hardware.
Keywords :
Petri nets; field programmable gate arrays; multiprocessing systems; FPGA; Petri formalism; Petri processor; hardware mechanism; heterogeneous multicore system; microblaze processors; multicore architecture; synchronization; Field programmable gate arrays; Hardware; Multicore processing; Silicon; Software; Synchronization; Vectors; FPGA; IPCore; Microblaze; MultiCore; Petri Net; SoftCore; Synchronization;
fLanguage :
English
Journal_Title :
Latin America Transactions, IEEE (Revista IEEE America Latina)
Publisher :
ieee
ISSN :
1548-0992
Type :
jour
DOI :
10.1109/TLA.2013.6502806
Filename :
6502806
Link To Document :
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