Title :
Algorithms and multi-valued circuits for the multioperand addition in the binary stored-carry number system
Author :
Etiemble, D. ; Navi, K.
Author_Institution :
LRI-UA CNRS, Univ. Paris Sud, Orsay, France
fDate :
29 Jun-2 Jul 1993
Abstract :
Algorithms for the sum of two (three and four) digits in the binary stored-carry number system, using the smallest set of values for the positional sum, are presented. The corresponding adders, which use multivalued current-mode circuits, are also presented. The implementation of multioperand additions using these adders is compared with the usual binary implementation
Keywords :
digital arithmetic; multivalued logic circuits; binary stored-carry number system; multi-valued circuits; multioperand addition; multivalued current-mode circuits; positional sum; Adders; Arithmetic; Bipolar transistors; CMOS technology; Current mode circuits; Detectors; Encoding; Power dissipation;
Conference_Titel :
Computer Arithmetic, 1993. Proceedings., 11th Symposium on
Conference_Location :
Windsor, Ont.
Print_ISBN :
0-8186-3862-1
DOI :
10.1109/ARITH.1993.378092
