DocumentCode :
2461163
Title :
A Reconfigurable FPGA-based 16-Channel Front-End for MRI
Author :
Dalai, I.L. ; Fontaine, Fred L.
Author_Institution :
Dept. of Electr. Eng., Cooper Union, New York, NY
fYear :
2006
fDate :
Oct. 29 2006-Nov. 1 2006
Firstpage :
1860
Lastpage :
1864
Abstract :
Parallel MRI acquisitions are generally reconstructed off-line on PCs and computer clusters. Building upon an existing multichannel digital receiver, we present an innovative single-FPGA front-end that performs real-time 2D-FFT reconstruction from arrays of up to 16 coils. Partial reconfiguration enables rapid switching of FPGA modules for maximal flexibility and lower hardware cost. After an acquisition has been buffered, more complicated parallel MRI reconstruction techniques can replace receiver logic. Alternatively, the front- end can be used as a hardware-accelerated reconstruction engine with other receivers or for PCs. As proof-of-concept for real-time non-cartesian reconstruction, a reconfigurable module for next- neighbor regridding of spiral MRI is also demonstrated.
Keywords :
field programmable gate arrays; image reconstruction; magnetic resonance imaging; 2D-FFT reconstruction; computer clusters; multichannel digital receiver; parallel MRI acquisitions; parallel MRI reconstruction techniques; real-time noncartesian reconstruction; reconfigurable FPGA; spiral MRI; Coils; Concurrent computing; Costs; Engines; Field programmable gate arrays; Hardware; Magnetic resonance imaging; Personal communication networks; Reconfigurable logic; Spirals;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signals, Systems and Computers, 2006. ACSSC '06. Fortieth Asilomar Conference on
Conference_Location :
Pacific Grove, CA
ISSN :
1058-6393
Print_ISBN :
1-4244-0784-2
Electronic_ISBN :
1058-6393
Type :
conf
DOI :
10.1109/ACSSC.2006.355084
Filename :
4176894
Link To Document :
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