Title :
High-Speed CMOS Chip Design for Manchester and Miller Encoder
Author :
Hung, Yu-Cherng ; Kuo, Min-Ming ; Tung, Chiou-Kou ; Shieh, Shao-Hui
Author_Institution :
Dept. of Electron. Eng., Nat. Chinyi Univ. of Technol., Taichung, Taiwan
Abstract :
In this paper, we propose a modified Manchester and Miller encoder that can operate in high frequency without a sophisticated circuit structure. Based on the previous proposed architecture, the study has adopted the concept of parallel operation to improve data throughput. In addition, the technique of hardware sharing is adopted in this design to reduce the number of transistors. The study uses TSMC CMOS 0.35-mum 2P4M technology. The simulation result of HSPICE indicates that it functions successfully and works at 200-MHz speed. The average power consumption of the circuit under room temperature is 549 muW. The total core area is 70.7 mumtimes72.2 mum. As expected, the circuit can be easily integrated into radio frequency identification (RFID) application.
Keywords :
CMOS integrated circuits; SPICE; UHF devices; radiofrequency identification; HSPICE simulation; Manchester encoder; Miller encoder; TSMC CMOS 2P4M technology; average power consumption; frequency 200 MHz; hardware sharing technique; high-speed CMOS chip design; parallel operation; power 549 muW; radio frequency identification application; size 0.35 mum; size 70.7 mum; size 72.2 mum; sophisticated circuit structure; temperature 293 K to 298 K; transistors; CMOS technology; Chip scale packaging; Circuit simulation; Energy consumption; Frequency; Hardware; Integrated circuit technology; Radiofrequency identification; Temperature; Throughput;
Conference_Titel :
Intelligent Information Hiding and Multimedia Signal Processing, 2009. IIH-MSP '09. Fifth International Conference on
Conference_Location :
Kyoto
Print_ISBN :
978-1-4244-4717-6
Electronic_ISBN :
978-0-7695-3762-7
DOI :
10.1109/IIH-MSP.2009.62
