Title :
Power-efficient trace caches
Author :
Hu, J.S. ; Vijaykrishnan, N. ; Kandemir, M. ; Irwin, M.J.
Author_Institution :
Dept. of Comput. Sci. & Eng., Pennsylvania State Univ., University Park, PA, USA
Abstract :
Summary form only given. This paper exploits the drawbacks of wasting power when accessing the instruction cache that stores only static sequence of instructions. Although trace cache is first introduced to catch the dynamic characteristics of instructions in execution, conventional trace cache (CTC) does increase the power consumption in fetch unit. A Sequential Trace Cache (STC) has been investigated for its power efficiency in this paper
Keywords :
cache storage; integrated memory circuits; low-power electronics; dynamic characteristics; dynamic sequences caching; fetch unit; instruction cache; power efficiency; power-efficient trace caches; sequential trace cache; Energy consumption;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition, 2002. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-1471-5
DOI :
10.1109/DATE.2002.999209
