DocumentCode
2465588
Title
A full on-chip low-dropout linear regulator with enhanced line, load regulation
Author
Ma, H.F. ; Zhou, F.
Author_Institution
ASIC&Syst. State Key Lab., Fudan Univ., Shanghai
fYear
2008
fDate
8-10 Dec. 2008
Firstpage
1
Lastpage
4
Abstract
A novel full on-chip (capacitor-less) low-dropout linear regulator is introduced in this paper. The main feature of the proposed LDO is its ability to be stable in the full-output-current range while still has good line and load regulations as well as improved transient response. This is achieved by using an advanced compensation network along with an adaptive-gain PMOS pass device. The post-layout simulations have revealed the advantageous performances of the LDO in all process corners. These include 3 uV/mA load regulation, 200 uV/V line regulation as well as 200 mV output voltage variation during load transient (the worst case). They are achieved in the condition of 0-100 mA output current capability, 200 mV dropout voltage and 54 uA no-load current consumption under a 2V supply.
Keywords
MIS devices; load regulation; voltage regulators; adaptive-gain PMOS pass device; advanced compensation network; current 0 mA to 100 mA; current 53 muA; dropout voltage; full on-chip low-dropout linear regulator; line regulation; load regulation; no-load current consumption; post-layout simulations; voltage 2 V; voltage 200 mV; Application specific integrated circuits; Capacitors; Electronic mail; Frequency; Network-on-a-chip; Regulators; Stability analysis; System-on-a-chip; Transient response; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electron Devices and Solid-State Circuits, 2008. EDSSC 2008. IEEE International Conference on
Conference_Location
Hong Kong
Print_ISBN
978-1-4244-2539-6
Electronic_ISBN
978-1-4244-2540-2
Type
conf
DOI
10.1109/EDSSC.2008.4760634
Filename
4760634
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