Title :
Nested miller active-capacitor frequency compensation for low-power three-stage amplifiers
Author :
Ma, H.F. ; Zhou, F.
Author_Institution :
ASIC & Syst. State Key Lab., Fudan Univ., Shanghai
Abstract :
A new frequency compensation technique for low-power, area-efficient multistage amplifiers is introduced in this work. By utilizing active capacitors to realize the compensation network in a nested way, two inverting gain stages can be used as the second and third gain-stages. The proposed scheme reaches better bandwidth-to-power and slew-rate-to-power performances comparing to the ever published works. Implemented in a standard 0.35 um CMOS technology, the proposed three-stage amplifier achieves 112-dB DC gain, 1.7-M GBW, 47deg phase margin and 1.95-V/mus average slew rate under a 500 pF capacitive load. All of these are realized with only 38 muW power consumption under a 2-V power supply and with very small compensation capacitors.
Keywords :
CMOS integrated circuits; amplifiers; capacitors; compensation; power consumption; CMOS technology; area-efficient multistage amplifiers; bandwidth-to-power; frequency compensation technique; nested Miller active-capacitor frequency compensation; power consumption; power supply; slew-rate-to-power; Application specific integrated circuits; Bandwidth; CMOS technology; Capacitors; Circuit topology; Energy consumption; Frequency; Power supplies;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2008. EDSSC 2008. IEEE International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-2539-6
Electronic_ISBN :
978-1-4244-2540-2
DOI :
10.1109/EDSSC.2008.4760637