Title :
Effective channel length increased due to switching from ≪110≫ to ≪100≫ orientation for PMOS transistors fabricated by 65 nm CMOS technology
Author :
Lau, W.S. ; Yang, Peizhen ; Ho, V. ; Lim, B.K. ; Siah, S.Y. ; Chan, L.
Author_Institution :
Sch. of Electr. & Electron. Eng., Nanyang Technol. Univ., Singapore
Abstract :
The on-state current of PMOS transistors fabricated on (100) Si substrate can be easily increased by switching from <110> to <100> orientation because of faster hole transport. In addition, PMOS transistors also become slightly ldquolongerrdquo. An experimental estimation of the increase of the effective channel length of the order of nm was made in PMOS transistors fabricated by 65 nm low-power CMOS technology. This can cause a noticeable drop in off current for short PMOS transistors.
Keywords :
CMOS integrated circuits; MOSFET; CMOS technology; PMOS transistors; Si substrate; size 65 nm; Boron; CMOS technology; Costs; Current measurement; Fabrication; Histograms; Leakage current; MOSFETs; Silicon; Switches;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2008. EDSSC 2008. IEEE International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-2539-6
Electronic_ISBN :
978-1-4244-2540-2
DOI :
10.1109/EDSSC.2008.4760686