Title :
Region of nearly constant off current versus gate length characteristics for sub-0.1 μm low power CMOS technology
Author :
Lau, W.S. ; Yang, Peizhen ; Ng, Edwin T L ; Chian, Z.W. ; Ho, V. ; Siah, S.Y. ; Chan, L.
Author_Institution :
Sch. of EEE, Nanyang Technol. Univ., Singapore
Abstract :
A minimum in the off current versus gate length characteristics can occur at a threshold voltage maximum for MOS transistors. Sometimes, instead of a minimum, an inflection point can occur at a threshold voltage maximum. We observed that more than one minimum can be experimentally seen. These multiple off current minima can interact with each other and inflection points to create a large range of gate lengths with around the same off current.
Keywords :
CMOS integrated circuits; MOSFET; MOS transistors; gate length characteristics; low power CMOS technology; off current characteristics; threshold voltage maximum; CMOS technology; Doping; Equations; Implants; Intrusion detection; Leakage current; MOSFETs; Sociotechnical systems; Subthreshold current; Threshold voltage;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2008. EDSSC 2008. IEEE International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4244-2539-6
Electronic_ISBN :
978-1-4244-2540-2
DOI :
10.1109/EDSSC.2008.4760689
