Fully integrated digital controller IC for buck converter with a differential-sensing ADC

Author

Chan, Man Pun ; Mok, Philip K T

Author_Institution

Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong

fYear

2008

fDate

8-10 Dec. 2008

Firstpage

1

Lastpage

4

Abstract

A low-power and high-speed ADC is crucial in a digital controller IC design. The Self-Strobe Delay-Line (SSDL) ADC architecture has been used because of its low-power and high-speed characteristics. However, the transconductance gain of the V-I converter in the SSDL ADC have not been optimized to have high sensitivity with low power consumption. In this paper, a differential sensing circuit was designed to obtain high transconductance gain without costing extra power and chip area. With the improved ADC, the digital controller IC was implemented with 0.35 mum CMOS process. Measurement results show that the 4 MHz, 600 mA buck converter operates properly with the 50 mV precision ADC and LC value of 2.2 muH and 220 nF.

Keywords

CMOS integrated circuits; analogue-digital conversion; digital control; low-power electronics; power convertors; power integrated circuits; CMOS process; analog-digital converters; buck converter; capacitance 220 nF; current 600 mA; differential sensing circuit; digital controller integrated circuit; self-strobe delay-line; size 0.35 mum; voltage 50 mV; Buck converters; CMOS digital integrated circuits; CMOS integrated circuits; Costing; Delay; Digital control; Digital integrated circuits; Energy consumption; High speed integrated circuits; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices and Solid-State Circuits, 2008. EDSSC 2008. IEEE International Conference on

Conference_Location

Hong Kong

Print_ISBN

978-1-4244-2539-6

Electronic_ISBN

978-1-4244-2540-2

Type

conf

DOI

10.1109/EDSSC.2008.4760690

Filename

4760690