Voltage gradient limitation of IGBTS by optimised gate-current profiles

Using MOS-controlled semiconductors provide the opportunity to directly affect the voltage and currents gradients during the switching transients at the gate. An active gate driver is presented that imposes optimised gate current profiles in order to limit the dv/dt and di/dt. When limiting the dv/dt to 1 kV/mus the switching losses are be reduced by 35% in comparison to the common limitation method by gate resistor. The switch-off losses are improved about 10% by employing an optimised gate signal.