DocumentCode :
2467375
Title :
High efficiency submicron gate LDMOS power FET for low voltage wireless communications
Author :
Ma, G. ; Burger, W. ; Xiaowei Ren ; Gibson, J. ; Shields, M.
Author_Institution :
Commun. Products Lab., Motorola Inc., Tempe, AZ, USA
Volume :
3
fYear :
1997
fDate :
8-13 June 1997
Firstpage :
1303
Abstract :
A low cost, high efficiency silicon MOSFET using 0.6 /spl mu/m LDMOS (LV3) technology was developed in Motorola for high frequency (1-2 GHz) and low voltage (3.4-12.5 V) wireless applications. The LV3 devices can deliver 77% power added efficiency (PAE) with 12 dB gain, 28.7 dBm output power at 3.4 V and 850 MHz. The LV3 devices also can provide 70% PAE, 11 dB gain, 36 dBm Pout at 6 V, 850 MHz and 50% PAE, 9 dB gain, 33 dBm Pout at 5.8 V, 1.9 GHz. This is the best known RF performance for silicon devices at 3.4 V and 6 V.
Keywords :
UHF field effect transistors; land mobile radio; power MOSFET; power field effect transistors; 0.6 micron; 1 to 2 GHz; 3.4 to 12.5 V; 50 to 77 percent; 9 to 12 dB; LV3 device; Motorola; RF performance; Si; gain; high frequency low voltage wireless communication; output power; power added efficiency; silicon MOSFET; submicron gate LDMOS power FET; Capacitance; FETs; Fingers; Gain; Implants; Low voltage; Power generation; Radio frequency; Transconductance; Wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium Digest, 1997., IEEE MTT-S International
Conference_Location :
Denver, CO, USA
ISSN :
0149-645X
Print_ISBN :
0-7803-3814-6
Type :
conf
DOI :
10.1109/MWSYM.1997.596566
Filename :
596566
Link To Document :
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