Evolving High-Speed, Energy-Efficient Integrated Circuits

State-of-the-art technologies in very large scale integration (VLSI) aim at the realization of fast energy-efficient circuits. Recent technological achievements offer a design parameter with which both the processing speed and power consumption of every single gate can be fine tuned. With respect to this design parameter, a VLSI design constitutes a multi-dimensional multi-modal optimization problem. Since existing algorithms yield only suboptimal designs, this paper investigates how genetic algorithms perform in this application domain. It turns out that genetic algorithms are able to reduce the power consumption by about 10-40%.