Merged two-stage power converterarchitecture with softcharging switched-capacitor energy transfer

This paper presents a two-stage architecture that combines a large step-down switched-capacitor transformation stage with a high-bandwidth magnetic regulation stage. The proposed design is particularly well-suited for an integrated CMOS process, as it makes use of the available on-die device characteristics. In such a process, the two-stage architecture presented offers high efficiency, high power density, and high- bandwidth regulation. We show that by merging the switched-capacitor stage and the regulation stage in a specific manner, further performance improvements can be attained. When the fast-switching regulation stage is used to provide soft charging of the switched-capacitor stage, a substantial improvement in performance is possible. An experimental prototype, implemented using discrete components, validates the approach.