DocumentCode :
2468859
Title :
Zero Energy Sag Corrector with reduced device count
Author :
Prasai, Anish ; Divan, Deepak
Author_Institution :
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA
fYear :
2008
fDate :
15-19 June 2008
Firstpage :
4103
Lastpage :
4109
Abstract :
Voltage sags are the leading cause of unscheduled downtime in industrial plants with high levels of automation. Zero energy sag correctors (ZESC) that utilize energy from those phases that have sufficient remaining voltage on them promises levels of protection that are comparable with conventional energy storage based sag correctors, but in a more compact package. This paper presents a ZESC topology with reduced device count using readily available device packages that can realize similar performance as the original ZESC circuit. The proposed ZESC behaves like a dasiathin AC converterpsila, and can be integrated with existing assets such as transformers and switchgears. This paper presents details of the operation, design and experimental results for such a ZESC circuit.
Keywords :
network topology; power supply circuits; power supply quality; ZESC circuit; ZESC topology; reduced device count; voltage sags; zero energy sag corrector; Automation; Circuit topology; Energy storage; Industrial plants; Packaging; Power quality; Protection; Switching converters; Transformers; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Electronics Specialists Conference, 2008. PESC 2008. IEEE
Conference_Location :
Rhodes
ISSN :
0275-9306
Print_ISBN :
978-1-4244-1667-7
Electronic_ISBN :
0275-9306
Type :
conf
DOI :
10.1109/PESC.2008.4592597
Filename :
4592597
Link To Document :
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