DocumentCode :
2468974
Title :
Reliable design of large crosspoint switching networks
Author :
Varma, A. ; Ghosh, J. ; Georgiou, C.J.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
1988
fDate :
27-30 June 1988
Firstpage :
320
Lastpage :
325
Abstract :
A major source of transient errors and unreliable operation of large crosspoint switching networks is the simultaneous switching ( Delta I) noise that is caused by the switching of a large number of off-chip drivers in a chip. An architectural solution to this problem is presented for networks constructed from one-sided crosspoint switching chips. The method seeks to achieve a uniform distribution of active drivers among the chips by rearranging a subset of the existing connections when a new connection is made. The problem is studied in the context of a one-sided crosspoint network with N=rn ports constructed from individual switching chips of size n*m/2. The authors show that the lower bound of m/r active drivers per chip can always be maintained in practice when m/r is an even number. The maximum number of rearrangements needed is min(m/2-1, 2r-1). In addition, the rearrangements are confined to two chip columns of the matrix.<>
Keywords :
multiprocessor interconnection networks; crossbar switching networks; large crosspoint switching networks; one-sided crosspoint switching chips; simultaneous switching; switching chips; Artificial intelligence; Circuit noise; Computer network reliability; Driver circuits; Inductance; Noise generators; Noise reduction; Packaging; Switches; Switching circuits;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Fault-Tolerant Computing, 1988. FTCS-18, Digest of Papers., Eighteenth International Symposium on
Conference_Location :
Tokyo, Japan
Print_ISBN :
0-8186-0867-6
Type :
conf
DOI :
10.1109/FTCS.1988.5338
Filename :
5338
Link To Document :
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