• DocumentCode
    2469159
  • Title

    A fast on-chip decoupling capacitance budgeting algorithm using macromodeling and linear programming

  • Author

    Zhao, Min ; Panda, Rajendran ; Sundareswaran, Savithri ; Yan, Shu ; Fu, Yuhong

  • fYear
    0
  • fDate
    0-0 0
  • Firstpage
    217
  • Lastpage
    222
  • Abstract
    We propose a novel and efficient charge-based decoupling capacitance budgeting algorithm. Our method uses the macro-modeling technique and effective radius of decoupling capacitance to reduce the size of the problem. We formulate the nonlinear optimization into a linear program (LP) by integrating the nodal equations across a time period of interest and through certain approximations. To reduce the error caused by linearization, we do multiple iterations of the linear program. Experimental results demonstrate that, with the proposed algorithm, even very large power networks (eg. 5 million nodes) can be optimized in a couple of hours with 1-2 transient analyses. Comparison of our algorithm with another heuristic method shows area efficiency and run time advantage of our method
  • Keywords
    circuit optimisation; integrated circuit modelling; linear programming; nonlinear programming; transient analysis; linear programming; macromodeling technique; nodal equations; nonlinear optimization; on-chip decoupling capacitance budgeting algorithm; transient analyses; Capacitance; Circuits; Ear; Equations; Linear programming; Optimization methods; Permission; Semiconductor device noise; Transient analysis; Voltage; Algorithms; Decoupling capacitance; Performance; Reliability; Verification; budgeting; macromodeling; sequence of linear programming;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2006 43rd ACM/IEEE
  • Conference_Location
    San Francisco, CA
  • ISSN
    0738-100X
  • Print_ISBN
    1-59593-381-6
  • Type

    conf

  • DOI
    10.1109/DAC.2006.229204
  • Filename
    1688792