DocumentCode
2469402
Title
Programming models and HW-SW interfaces abstraction for multi-processor SoC
Author
Jerraya, Ahmed A. ; Bouchhima, Aimen ; Pétrot, Frédéric
Author_Institution
TIMA Lab., Grenoble
fYear
0
fDate
0-0 0
Firstpage
280
Lastpage
285
Abstract
For the design of classic computers the parallel programming concept is used to abstract HW/SW interfaces during high level specification of application software. The software is then adapted to existing multiprocessor platforms using a low level software layer that implements the programming model. Unlike classic computers, the design of heterogeneous MPSoC includes also building the processors and other kind of hardware components required to execute the software. In this case, the programming model hides both hardware and software refinements. This paper deals with parallel programming models to abstract both hardware and software interfaces in the case of heterogeneous MPSoC design. Different abstraction levels are needed. For the long term, the use of higher level programming models open new vistas for optimization and architecture exploration like CPU/RTOS tradeoffs
Keywords
hardware-software codesign; logic design; multiprocessing systems; parallel programming; system-on-chip; HW-SW interfaces abstraction; MPSoC design; higher level programming models; multiprocessor SoC; system-on-chip; Application software; Application specific processors; Computer architecture; Computer interfaces; Concurrent computing; Hardware; High performance computing; Laboratories; Parallel programming; Software performance; Algorithms; Design; HW/SW interfaces; Heterogeneous MPSoC; Programming models; Standardization;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2006 43rd ACM/IEEE
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
1-59593-381-6
Type
conf
DOI
10.1109/DAC.2006.229246
Filename
1688804
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