A generalized algorithm of n-level space vector PWM suitable for hardware implementation

Based on the close relationships on the dwelling time calculations and the on-time arrangement among all six sectors with geometrical symmetry, a generalized algorithm of multilevel space vector PWM (SVPWM) suitable for hardware implementation is proposed. Compared with the conventional algorithm, the proposed algorithm is more suitable for hardware implementation by reducing the computation load. For flexibility and versatility, some design considerations are given. Two design examples, a two-level SVPWM IP (intellectual property) core and a three-level SVPWM IP core, are used to verify the feasibility of the proposed algorithm.