DocumentCode
2470722
Title
A parallel architecture for detection
Author
Fan, John L. ; Cioffi, John M.
Author_Institution
Inf. Syst. Lab., Stanford Univ., CA, USA
fYear
1998
fDate
16-21 Aug 1998
Firstpage
263
Abstract
A parallel architecture, consisting of an array of decision elements using only local information about the received signal and previous decisions, is considered for the detection of binary signals over an intersymbol interference (ISI) channel. Some different configurations are considered, including the decision-feedback equalizer (DFE), which can be reformulated in this context
Keywords
decision feedback equalisers; intersymbol interference; parallel architectures; signal detection; telecommunication channels; DFE; ISI channel; binary signals; decision elements; decision-feedback equalizer; intersymbol interference channel; local information; parallel architecture; received signal; Context; Decision feedback equalizers; Information systems; Intersymbol interference; Matched filters; Maximum likelihood decoding; Parallel architectures; Phase noise; Signal detection; Viterbi algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Theory, 1998. Proceedings. 1998 IEEE International Symposium on
Conference_Location
Cambridge, MA
Print_ISBN
0-7803-5000-6
Type
conf
DOI
10.1109/ISIT.1998.708868
Filename
708868
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