A family of cells to reduce the soft-error-rate in ternary-CAM

Author

Azizi, Navid ; Najm, Farid N.

Author_Institution

Dept. of ECE, Toronto Univ., Ont.

fYear

0

fDate

0-0 0

Firstpage

779

Lastpage

784

Abstract

Modern integrated circuits require careful attention to the soft-error rate (SER) resulting from bit upsets, which are normally caused by alpha particle or neutron hits. These events, also referred to as single-event upsets (SEUs), will become more problematic in future technologies. This paper presents a ternary content-addressable memory (CAM) design with high immunity to SEU. Conventionally, error-correcting codes (ECC) have been used in SRAMs to address this issue, but these techniques are not immediately applicable to CAMs because they depend on processing the full contents of the memory word outside the array, which is not possible in a normal CAM access. We propose a family of TCAM cells that reduce the SER at the cost of some area increase. An SER reduction of up to 40% can be obtained with a 18% increase of area; another design reduces the SER by 16% with only a 5% increase in area

Keywords

content-addressable storage; error correction; integrated circuit design; integrated circuit reliability; neutron effects; TCAM cells; alpha particle; bit upsets; error correcting codes; memory word; neutron hits; single-event upsets; soft-error rate; ternary content-addressable memory design; Alpha particles; CADCAM; Circuits; Computer aided manufacturing; Costs; Error correction codes; Frequency; Neutrons; Random access memory; Single event upset; Content-Addressable Memory; Design; Soft-Error Rate;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2006 43rd ACM/IEEE

Conference_Location

San Francisco, CA

ISSN

0738-100X

Print_ISBN

1-59593-381-6

Type

conf

DOI

10.1109/DAC.2006.229229

Filename

1688901