DocumentCode :
2471667
Title :
Silicon carrier for computer systems
Author :
Patel, Chirag S.
Author_Institution :
IBM T. J. Watson Res. Center, Yorktown Heights, NY
fYear :
0
fDate :
0-0 0
Firstpage :
857
Lastpage :
862
Abstract :
System-on-package (SOP) based on silicon carriers has the potential to provide modular design flexibility and high-performance integration of heterogeneous chip technologies for a wide range of two- and three-dimensional product applications. Key technology enablers include silicon through-vias, high-density wiring, high-I/O chip interconnection, and supporting test and assembly technologies. This paper describes the electrical characterization of key technical elements of the silicon carrier and discusses the significance of those elements in enhancing the overall system performance. The paper also discusses some methodologies that may allow silicon carrier technical elements to be easily integrated within existing EDA tools
Keywords :
circuit CAD; integrated circuit design; integrated circuit interconnections; microprocessor chips; silicon; system-in-package; EDA tools; chip interconnection; computer systems; electrical characterization; heterogeneous chip technologies; high-density wiring; high-performance integration; modular design flexibility; silicon carrier; silicon through-vias; system-on-package; test and assembly technologies; Application software; CMOS technology; Electronic design automation and methodology; Microprocessors; Packaging; Power distribution; Power system interconnection; Silicon; System performance; Wiring; CMOS scaling; Chip-Package Co-design; Design; Measurement; Micro-bumps; Performance; Silicon carrier; System on Package; computer system; electrical modeling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference, 2006 43rd ACM/IEEE
Conference_Location :
San Francisco, CA
ISSN :
0738-100X
Print_ISBN :
1-59593-381-6
Type :
conf
DOI :
10.1109/DAC.2006.229241
Filename :
1688917
Link To Document :
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