Analog realization of iterative threshold decoding based on high-order recurrent neural networks

Artificial neural networks (ANN) are known for their ability to solve classification and optimization tasks and have been applied in many fields of communications such as equalization and multiuser detection, among others. In this paper an analog realization of iterative threshold decoding for binary linear codes is presented. It is shown that the iterative threshold decoding algorithm matches well with the structure of a continuous high-order recurrent neural network. The performance of the analog realization has been evaluated by simulation and is compared with the corresponding digital realisation. The motivation of this work is that analog decoding improves the power/speed ratio and minimizes the area consumption on the very large scale integration (VLSI) chip.