DocumentCode
2471974
Title
Moore´s law-is there more?
Author
Brown, K.H.
Author_Institution
Nat. Inst. of Stand. & Technol., Gaithersburg, MD, USA
fYear
2000
fDate
11-13 July 2000
Firstpage
2
Lastpage
3
Abstract
Lithography improvements and device scaling have been the major driver behind the industry productivity as predicted by Moore´s law over the past three decades. In fact for the past five years, in an effort to remain the productivity curve when other improvements (e.g., tool reliability, process yield) have reached their practical limits, the industry has accelerated the introduction of smaller feature sizes. Between 1994 and 1999 the technology roadmap for feature size introduction has been pulled in three years. The current timeline has features below 0.13um introduced in product by 2001. The ability to continue on this path will be dominated by two key factors at dimensions below 0.13 /spl mu/m. The first factor is the approaching limits to the scaling laws and performance benefits at the chip level. The second is cost. The author briefly reviews possible future developments in this field.
Keywords
CMOS integrated circuits; design for manufacture; integrated circuit design; integrated circuit manufacture; lithography; Moore´s law; device scaling; feature size; industry productivity; lithography; scaling laws; CMOS technology; Dielectrics; Lithography; Manufacturing industries; Moore´s Law; NIST; Optical materials; Physics; Production; Productivity;
fLanguage
English
Publisher
ieee
Conference_Titel
Microprocesses and Nanotechnology Conference, 2000 International
Conference_Location
Tokyo, Japan
Print_ISBN
4-89114-004-6
Type
conf
DOI
10.1109/IMNC.2000.872595
Filename
872595
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