DocumentCode :
247211
Title :
A Non-Volatile Memory MONOS Device for Improved Stability Applications
Author :
Gupta, A. ; Anwer, H. ; Gupta, D. ; Vijayvargia, V. ; Vishvakarma, S.K.
Author_Institution :
VLSI Circuit & Syst. Design Lab., Indian Inst. of Technol. Indore, Indore, India
fYear :
2014
fDate :
12-13 Sept. 2014
Firstpage :
1
Lastpage :
3
Abstract :
The stability of Metal-Oxide-Nitride-Oxide-Silicon (MONOS) memory structures remain a major concern for Non-Volatile Memory (NVM) devices. In this paper, working on 30-nm technology we have analyzed a MONOS like structure involving the use of multilayer high- k dielectrics as the blocking layer. The work demonstrates the superiority of the structure with multilayered high-k blocking stack over the conventional MONOS structure which uses silicon dioxide as the blocking layer. The structure shows large Programming/Erasing (P/E) window and hence high stability, also better suppression of charge transition when the cell is idle as well as faster programming speed. TCAD Silvaco was used for the simulations.
Keywords :
circuit stability; high-k dielectric thin films; integrated memory circuits; random-access storage; NVM device; P/E window; TCAD Silvaco; blocking layer; charge transition suppression; high-k blocking stack; improved stability application; metal-oxide-nitride-oxide-silicon memory structure; multilayer high-k dielectric; nonvolatile memory MONOS device; programming speed; programming/erasing window; silicon dioxide; size 30 nm; Dielectrics; Flash memories; High K dielectric materials; MONOS devices; Nonvolatile memory; Programming; Stability analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Devices, Circuits and Communications (ICDCCom), 2014 International Conference on
Conference_Location :
Ranchi
Type :
conf
DOI :
10.1109/ICDCCom.2014.7024690
Filename :
7024690
Link To Document :
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