DocumentCode
2472237
Title
System level signal and power integrity analysis methodology for system-in-package applications
Author
Mandrekar, Rohan ; Bharath, Krishna ; Srinivasan, Krishna ; Engin, Ege ; Swaminathan, Madhavan
Author_Institution
Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA
fYear
0
fDate
0-0 0
Firstpage
1009
Lastpage
1012
Abstract
This paper describes a methodology for performing system level signal and power integrity analyses of SiP-based systems. The paper briefly outlines some new modeling and simulation techniques that have been developed to enable the proposed methodology. Some results based on the application of this methodology on test systems are also presented
Keywords
integrated circuit modelling; system-in-package; modal decomposition; nodal admittance matrix method; power integrity; signal integrity; system-in-package; Admittance; Analytical models; Application software; Packaging; Performance analysis; Power engineering and energy; Power engineering computing; Power system modeling; Signal analysis; System testing; Causality; Design; System-In-Package (SiP); finite difference method; modal decomposition; nodal admittance matrix method; power integrity; signal integrity;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2006 43rd ACM/IEEE
Conference_Location
San Francisco, CA
ISSN
0738-100X
Print_ISBN
1-59593-381-6
Type
conf
DOI
10.1109/DAC.2006.229428
Filename
1688946
Link To Document