Title :
Technology mapping algorithms for sequential circuits using look-up table based FPGAS
Author :
Habib, Stanley ; Xu, Quan
Author_Institution :
Dept. of Comput. Sci., Graduate Sch. of City Univ. of New York, NY, USA
Abstract :
This paper presents a set of algorithms for mapping sequential circuits onto look-up table based FPGAs and explores how it is possible to reduce the time delay and simplify the final routing results of this mapping. We define several new terms which are used to describe the problem. This work focuses on the mapping of flip-flops and their adjacent combinational parts in sequential circuits using LUT based FPGAs
Keywords :
circuit layout CAD; delays; field programmable gate arrays; flip-flops; logic CAD; network routing; sequential circuits; table lookup; FPGAS; adjacent combinational parts; flip-flops; look-up table; routing results; sequential circuits; technology mapping algorithms; time delay; Combinational circuits; Delay effects; Feedback circuits; Feedback loop; Field programmable gate arrays; Flip-flops; Logic; Sequential circuits; Switches; Table lookup;
Conference_Titel :
VLSI, 1995. Proceedings., Fifth Great Lakes Symposium on
Conference_Location :
Buffalo, NY
Print_ISBN :
0-8186-7035-5
DOI :
10.1109/GLSV.1995.516045
