DocumentCode
2473051
Title
4-bit flash ADC in InP-HBT technology using distributed resistor ladder
Author
Mokhtari, Mehran ; Jensen, Joseph F. ; Kaplan, Todd ; Fields, Charles ; McLaughlin, Douglas ; Ng, Willie
Author_Institution
Hughes Res. Labs., Malibu, CA, USA
fYear
2004
fDate
19-22 Sept. 2004
Firstpage
143
Lastpage
146
Abstract
4-bit flash A/D converters have been designed and fabricated in InP-HBT technology. The circuit utilizes a novel distributed ladder structure to create the quantization reference voltages. Based on signal-to-noise-and-distortion measurements, the effective number of bits was calculated as 3.9 bits at 10 GS/S. The circuit consumes about 1.9 A from a single 31 V supply and allocates a total area of 3225×1875 μm2.
Keywords
analogue-digital conversion; bipolar MMIC; ladder networks; 1.9 A; 1875 micron; 31 V; 3225 micron; 4.9 GHz; HBT technology; InP; distributed resistor ladder structure; flash ADC; high-sample-rate ADC; quantization reference voltages; signal-to-noise-and-distortion ratio; Area measurement; Circuits; Clocks; Frequency conversion; Quantization; Read only memory; Resistors; Sampling methods; Velocity measurement; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Radio and Wireless Conference, 2004 IEEE
Print_ISBN
0-7803-8451-2
Type
conf
DOI
10.1109/RAWCON.2004.1389093
Filename
1389093
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