Title :
Distributed via connectivity in high resolution package power delivery modeling
Author_Institution :
Intel Corp, Haifa, Israel
Abstract :
High resolution electrical models can be generated for chip packaging power delivery networks. The lumped versus distributed stitching of vertical path connections such as micro-via and plated-through-holes can introduce various effects on the model predictions.
Keywords :
electronics packaging; chip packaging power delivery networks; distributed stitching; high resolution electrical model; high resolution package power delivery modeling; lumped stitching; vertical path connection; Contacts; Distributed power generation; Engines; Histograms; Packaging; Power generation; Power supplies; Predictive models; Testing; Voltage; Distributed Models; Power Delivery; Via Connectivity;
Conference_Titel :
Electrical Performance of Electronic Packaging and Systems, 2009. EPEPS '09. IEEE 18th Conference on
Conference_Location :
Portland, OR
Print_ISBN :
978-1-4244-4447-2
Electronic_ISBN :
978-1-4244-5646-8
DOI :
10.1109/EPEPS.2009.5338433
