Title :
An efficient software-based implementation of a joint-detection/spatial processing receiver for TD-SCDMA
Author :
Aberl, Peter ; Gatherer, Alan
Author_Institution :
Syst. Eng. Wireless Infrastructure, Freising, Germany
Abstract :
TD-SCDMA is known as the low chip-rate time division duplex (LCR TDD) mode of the third generation partnership program (3GPP). It incorporates a combination of time and code division multiple access schemes and is well suited for advanced techniques like joint detection (JD) and spatial processing. This work focuses on the performance and memory requirements of a completely software-based zero-forcing block linear (ZF-BLE) JD and spatial processing receiver for a TD-SCDMA system, which combats intersymbol interference (ISI) as well as multi access interference (MAI). The analysis is based on the TMS320C6416T, which is a 1 GHz DSP with four 16-bit MAC units and a 1 Mbyte level-2 unified on-chip memory space.
Keywords :
3G mobile communication; code division multiple access; digital signal processing chips; interference suppression; intersymbol interference; radio receivers; software radio; storage management; time division multiple access; time division multiplexing; 3GPP; DSP; ISI; LCR TDD; MAC units; MAI; TD-SCDMA; TMS320C6416T; ZF-BLE JD; code division multiple access; intersymbol interference suppression; joint-detection/spatial processing receiver; low chip-rate time division duplex; memory requirements; multi access interference; on-chip memory; performance; software-based implementation; third generation partnership program; time division multiple access; zero-forcing block linear JD; Base stations; Digital signal processing; Downlink; Interference; Internet telephony; Multiaccess communication; Open loop systems; Receiving antennas; Signal processing; Time division synchronous code division multiple access;
Conference_Titel :
Radio and Wireless Conference, 2004 IEEE
Print_ISBN :
0-7803-8451-2
DOI :
10.1109/RAWCON.2004.1389134
