DocumentCode :
2474667
Title :
Enhancing the robustness of a multiple floating field-limiting ring termination by introducing a buffer layer
Author :
Vanmeerbeek, P. ; Roig, J. ; Bogman, F. ; Moens, P. ; Villamor-Baliarda, A. ; Flores, D.
Author_Institution :
Power Technol. Centre, ON Semicond., Oudenaarde, Belgium
fYear :
2012
fDate :
3-7 June 2012
Firstpage :
357
Lastpage :
360
Abstract :
A planar multiple floating field-limiting ring structure, designed for above 600V blocking capability, is analyzed in this work. We have proven by simulation and experiment that adding a well designed buffer layer in the epi-substrate region counteracts on the drop in electric field which is due to the space charge limited current and as such the buffer enhances the robustness towards reverse voltage biasing.
Keywords :
buffer circuits; limiters; power semiconductor devices; space charge; blocking capability; buffer layer; electric field; epi-substrate region; multiple floating field-limiting ring termination; planar multiple floating field-limiting ring structure; reverse voltage biasing; robustness; space charge limited current; Buffer layers; Electric breakdown; Impact ionization; Resistance; Robustness; Schottky diodes; Substrates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Power Semiconductor Devices and ICs (ISPSD), 2012 24th International Symposium on
Conference_Location :
Bruges
ISSN :
1943-653X
Print_ISBN :
978-1-4577-1594-5
Electronic_ISBN :
1943-653X
Type :
conf
DOI :
10.1109/ISPSD.2012.6229095
Filename :
6229095
Link To Document :
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