DocumentCode
2474878
Title
Path-delay fingerprinting for identification of recovered ICs
Author
Zhang, Xuehui ; Xiao, Kan ; Tehranipoor, Mohammad
Author_Institution
ECE, Univ. of Connecticut, Storrs, CT, USA
fYear
2012
fDate
3-5 Oct. 2012
Firstpage
13
Lastpage
18
Abstract
The counterfeiting of integrated circuits (ICs) has been on the rise over the past decade, impacting the security and reliability of electronic systems. Reports show that recovered ICs contribute to about 80% of all counterfeit ICs in the market today. Such ICs are recovered from scrapped boards of used devices. Identification of such counterfeit ICs is a great challenge since these ICs have an identical appearance, functionality, and package as fresh ICs. In this paper, a novel path-delay fingerprinting technique is proposed to distinguish recovered ICs from fresh ICs. Due to degradation in the field, the path delay distribution of recovered ICs will become different from that found in fresh ICs. Statistical data analysis can effectively separate the impact of process variations from aging effects on path delay. Simulation results of benchmark circuits using 45 nm technology demonstrate the efficiency of this technique for recovered IC identification.
Keywords
data analysis; delays; integrated circuit reliability; statistical analysis; electronic system security; integrated circuit reliability; path delay distribution; path-delay fingerprinting technique; recovered IC identification; size 45 nm; statistical data analysis; Aging; Clocks; Degradation; Delay; Integrated circuits; Logic gates; Principal component analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 IEEE International Symposium on
Conference_Location
Austin, TX
Print_ISBN
978-1-4673-3043-5
Type
conf
DOI
10.1109/DFT.2012.6378192
Filename
6378192
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