DocumentCode
2474883
Title
Energy-efficient performance budgeting in FEC-based high-speed I/O links
Author
Narasimha, Rajan Lakshmi ; Shanbhag, Naresh
Author_Institution
ECE Dept., Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA
fYear
2009
fDate
19-21 Oct. 2009
Firstpage
41
Lastpage
44
Abstract
In this paper, we look at how the introduction of forward error correction (FEC) impacts system design in a high-speed I/O link. We present examples where coding gain maps to improvements in transmit swing, ADC precision, jitter tolerance and comparator offset tolerance.
Keywords
analogue-digital conversion; comparators (circuits); forward error correction; integrated circuit design; jitter; radio links; ADC precision; FEC-based high-speed I/O links; coding gain; comparator offset tolerance; energy-efficient performance budgeting; forward error correction; jitter tolerance; system design; transmit swing; Crosstalk; Decision feedback equalizers; Design optimization; Energy efficiency; Forward error correction; Intersymbol interference; Jitter; Power amplifiers; Quantization; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging and Systems, 2009. EPEPS '09. IEEE 18th Conference on
Conference_Location
Portland, OR
Print_ISBN
978-1-4244-4447-2
Electronic_ISBN
978-1-4244-5646-8
Type
conf
DOI
10.1109/EPEPS.2009.5338483
Filename
5338483
Link To Document