DocumentCode
2475196
Title
Accurate calculation of SET propagation probability for hardening
Author
Gangadhar, Sreenivas ; Tragoudas, Spyros
Author_Institution
Dept. of Electr. & Comput. Eng., Southern Illinois Univ. Carbondale, Carbondale, IL, USA
fYear
2012
fDate
3-5 Oct. 2012
Firstpage
104
Lastpage
108
Abstract
A novel method is proposed to enhance SET propagation probability and it is shown how it can assist the hardening process. This paper provides a method to determine a set of patterns that must be applied at the inputs to determine propagation characteristics of the SET that are meaningful for hardening purposes. The impact of the proposed method is experimentally verified on the ISCAS and ITC benchmarks.
Keywords
probability; radiation hardening (electronics); sequential circuits; ISCAS benchmarks; ITC benchmarks; SET propagation characteristics; SET propagation probability; radiation hardening process; sequential circuit; soft error hardening techniques; Boolean functions; Circuit faults; Delay; Integrated circuit modeling; Logic gates; Probability; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 IEEE International Symposium on
Conference_Location
Austin, TX
Print_ISBN
978-1-4673-3043-5
Type
conf
DOI
10.1109/DFT.2012.6378208
Filename
6378208
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