DocumentCode :
2475351
Title :
Built-in generation of multi-cycle broadside tests
Author :
Pomeranz, Irith
Author_Institution :
Sch. of Electr. & Comput. Eng., Purdue Univ., West Lafayette, IN, USA
fYear :
2012
fDate :
3-5 Oct. 2012
Firstpage :
146
Lastpage :
151
Abstract :
This paper describes a built-in test generation method for multi-cycle broadside tests. A multicycle broadside test consists of a scan-in state and a sequence of primary input vectors. The method described in this paper uses pseudo-random scan-in states. The paper focuses on the generation of primary input sequences. A fixed set of primary input subsequences is implemented on-chip using a small number of small finite-state machines. Primary input configurations, which are implemented using multiplexers, determine primary input sequences for multicycle broadside tests by selecting a subsequence from the set for every primary input. Experimental results show that high transition fault coverage can be achieved even with pseudo-random scan-in states.
Keywords :
built-in self test; finite state machines; multiplexing equipment; built-in test generation method; high transition fault coverage; multicycle broadside tests; multiplexers; on-chip; primary input subsequences; primary input vectors; pseudorandom scan-in states; small finite-state machines; Circuit faults; Clocks; Fault detection; Hardware; Logic gates; System-on-a-chip; Vectors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-3043-5
Type :
conf
DOI :
10.1109/DFT.2012.6378215
Filename :
6378215
Link To Document :
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