DocumentCode :
2475626
Title :
Dependable routing in multi-chip NoC platforms for automotive applications
Author :
Yoneda, Tomohiro ; Imai, Masashi
Author_Institution :
Nat. Inst. of Inf., Tokyo, Japan
fYear :
2012
fDate :
3-5 Oct. 2012
Firstpage :
217
Lastpage :
224
Abstract :
This paper proposes dependable routing algorithms for multi-chip NoC platforms. In a multi-chip NoC platform, multiple NoCs are connected via off-chip links, and on-chip networks are seamlessly extended to a multi-chip network. Such platforms have several potential advantages in embedded systems with many cores, such as automotive control systems. One limitation of this approach is that the extended multi-chip network cannot usually preserve the full topology of the on-chip network within the LSI package, due to the limitation of number of pins in the LSI packages. Furthermore, automotive companies require the dependability against a chip fault, where the whole chip becomes faulty, in addition to the normal single component (a router or a link) fault model. This paper discusses two approaches to the dependable routing algorithms for the multichip NoC platforms, and compares their performance through Verilog simulations.
Keywords :
automotive electrics; hardware description languages; network routing; network-on-chip; LSI package; Verilog simulation; automotive application; automotive control system; chip fault; dependable routing algorithm; multichip NoC platform; off-chip link; on-chip network; Circuit faults; Clustering algorithms; Logic gates; Routing; System recovery; System-on-a-chip; Topology; 2D mesh topology; Dependable routing algorithm; Multi-chip NoCs; Single chip/router/link fault; Wormhole routing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2012 IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
978-1-4673-3043-5
Type :
conf
DOI :
10.1109/DFT.2012.6378227
Filename :
6378227
Link To Document :
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