Unified DA-based Parallel Architecture for Computing the DCT and the DST

A common computing-core representation of the discrete cosine transform and discrete sine transform is derived, and a reduced-complexity algorithm is developed for computation of the proposed common computing-core. A parallel architecture based on the principle of distributed arithmetic is designed further for computation of these transforms using the common-core algorithm. The proposed scheme not only leads to a systolic-like, fully-pipelined regular and modular hardware for computing the these transforms, but also offers significant saving of hardware over the existing structures having nearly the same computational throughput. The proposed structure is devoid of complicated input/output mapping and does not involve any complex control structure. Moreover, it does not have restriction on the transform-length, and can be utilized as a reusable core for cost-effective, high-throughput implementation of either of these transforms