Title :
Operational amplifier design for high-speed pipelined Analog-to-Digital Converters in deep-submicron CMOS processes
Author :
Nieminen, Tero ; Halonen, Kari
Author_Institution :
Sch. of Electr. Eng., Dept. of Micro- & Nanosci., Aalto Univ., Aalto, Finland
Abstract :
In this paper, design challenges of an operational amplifier (opamp) for medium-resolution pipelined Analog-to-Digital Converters (ADCs) in deep-submicron CMOS processes are discussed. Comparisons are made between basic opamp topologies in 130 nm CMOS process, concerning particularly on gain, bandwidth, signal headroom and power consumption with 1.2V supply.
Keywords :
CMOS analogue integrated circuits; analogue-digital conversion; operational amplifiers; ADC; deep-submicron CMOS processes; high-speed pipelined analog-to-digital converters; opamp topologies; operational amplifier design; power consumption; signal headroom; size 130 nm; voltage 1.2 V; Bandwidth; CMOS integrated circuits; Frequency response; Pipelines; Power demand; Transistors;
Conference_Titel :
Ph.D. Research in Microelectronics and Electronics (PRIME), 2011 7th Conference on
Conference_Location :
Trento
Print_ISBN :
978-1-4244-9138-4
Electronic_ISBN :
978-1-4244-9136-0
DOI :
10.1109/PRIME.2011.5966219
