Title :
How to build a useful thousand-core manycore system?
Author :
Torrellas, Josep
Author_Institution :
Univ. of Illinois, Urbana, IL, USA
Abstract :
Current hardware roadmaps call for doubling the number of on-chip cores approximately every two years. If this trend materializes, in at most a decade and a half, we will reach one thousand cores. This scenario has mind-boggling consequences for the IPDPS research community. There are many questions to answer. For example, at the architecture level, how are we going to power these chips and provide the required bandwidth? At the software level, how are we going to manage possibly-heterogeneous resources with low overhead, efficiently compile for these machines, and provide programmer-friendly programming models? At the application level, what kinds of applications and algorithms will we use? This panel will provide an opportunity for the conference attendees to discuss all of these topics.
Keywords :
microprocessor chips; multiprocessing systems; resource allocation; IPDPS research community; heterogeneous resource management; on-chip core; program compiler; programmer-friendly programming model; thousand-core manycore system; Application software; Bandwidth; Computer architecture; Computer science; Hardware; Multicore processing; Multithreading; Resource management;
Conference_Titel :
Parallel & Distributed Processing, 2009. IPDPS 2009. IEEE International Symposium on
Conference_Location :
Rome
Print_ISBN :
978-1-4244-3751-1
Electronic_ISBN :
1530-2075
DOI :
10.1109/IPDPS.2009.5160862