A high speed linear buffer for A/D conversion beyond 100 GS/s in InP DHBT Technology

Author

Ferenci, Damir ; Grözing, Markus ; Berroth, Manfred

Author_Institution

Inst. of Electr. & Opt. Commun. Eng., Univ. of Stuttgart, Stuttgart, Germany

fYear

2011

fDate

3-7 July 2011

Firstpage

113

Lastpage

116

Abstract

A linear buffer for high speed demultiplexing is presented in InP DHBT Technology. The buffer has a SNDR of 38 dB with a differential input voltage of 500 mV-PP and a 3 dB corner frequency above 50 GHz. The power consumption of the buffer is 0.5 W at a supply voltage of 5 V. The buffer is suitable for applications which need a low amplification and a high output bandwidth e.g. in a high speed demultiplexer circuit.

Keywords

III-V semiconductors; analogue-digital conversion; buffer circuits; demultiplexing equipment; heterojunction bipolar transistors; indium compounds; millimetre wave amplifiers; millimetre wave bipolar transistors; A/D conversion; DHBT technology; InP; high speed demultiplexer circuit; high speed demultiplexing; high speed linear buffer; power 0.5 W; power consumption; voltage 5 V; voltage 500 V; Bandwidth; Distortion measurement; Indium phosphide; Linearity; Optical fiber communication; Signal resolution; Transmission line measurements;

fLanguage

English

Publisher

ieee

Conference_Titel

Ph.D. Research in Microelectronics and Electronics (PRIME), 2011 7th Conference on

Conference_Location

Trento

Print_ISBN

978-1-4244-9138-4

Electronic_ISBN

978-1-4244-9136-0

Type

conf

DOI

10.1109/PRIME.2011.5966230

Filename

5966230