A 1.72μW, 23.2fj/conversion step successive approach ADC for bio-medical signal acquisition

Author

Wang, Wei-Sheng ; Tang, Kea-Tiong

fYear

2011

fDate

Aug. 30 2011-Sept. 3 2011

Firstpage

2703

Lastpage

2706

Abstract

This paper presents a successive approach register (SAR) analog-to-digital converter (ADC) with a novel hybrid digital-to-analog converter (DAC) architecture: half junction splitting (J.S.) and half binary weighted capacitor DAC. This DAC maintains low power consumption of J.S. DAC and the high signal-to-noise plus distortion ratio (SNDR) of binary weighted capacitor DAC. The power dissipation of the circuit is 1.72μW, SNDR 59.17dB, spurious free dynamic range (SFDR) 73.39dB, and the FOM 23.2fj/conversion step with 0.9V supply voltage. The proposed circuit is fabricated in TSMC 0.18μm 1P6M CMOS process technology.

Keywords

CMOS integrated circuits; analogue-digital conversion; biomedical equipment; capacitors; low-power electronics; medical signal detection; 23.2fj-conversion step successive approach ADC; JS DAC low power consumption; SAR analog-to-digital converter; TSMC 0.18μm 1P6M CMOS process technology; biomedical signal acquisition; circuit power dissipation; half binary weighted capacitor DAC; half junction splitting; noise figure 59.17 dB; novel hybrid digital-to-analog converter architecture; power 1.72 muW; size 0.18 mum; spurious free dynamic range; successive approach register; voltage 0.9 V; Capacitors; Joining processes; Noise; Power demand; Power dissipation; Switches; Voltage control; Analog-Digital Conversion; Electronics, Medical;

fLanguage

English

Publisher

ieee

Conference_Titel

Engineering in Medicine and Biology Society, EMBC, 2011 Annual International Conference of the IEEE

Conference_Location

Boston, MA

ISSN

1557-170X

Print_ISBN

978-1-4244-4121-1

Electronic_ISBN

1557-170X

Type

conf

DOI

10.1109/IEMBS.2011.6090742

Filename

6090742