• DocumentCode
    2480651
  • Title

    A polynomial time flow for implementing free-choice Petri-nets

  • Author

    Mattheakis, Pavlos M. ; Sotiriou, Christos P. ; Beerel, Peter A.

  • Author_Institution
    FORTH-ICS, Heraklion, Greece
  • fYear
    2012
  • fDate
    Sept. 30 2012-Oct. 3 2012
  • Firstpage
    227
  • Lastpage
    234
  • Abstract
    FSM and PTnet control models are pertinent in both software and hardware applications as both specification and implementation models. The state-based, monolithic FSM model is directly implementable in software or hardware, but cannot model concurrency without state explosion. Interacting FSM models have so far lacked the formal rigor for expressing the synchronising interactions between different FSMs. The event-based, PTnet model is able to model both concurrency and choice within the same model, however lacks a polynomial time flow to implementation, as current methods of exposing the event state space require a potentially exponential number of states. In this work, we present a polynomial complexity flow for transforming a Free-Choice PTnet into a new formalism for Interacting FSMs, i.e Multiple, Synchronised FSMs (MSFSMs), a compact Interacting FSMs model, potentially implementable using any existing monolithic FSM implementation method. We believe that such a flow can in the long term bridge the event and state-based models. We present execution time and state space results of exercising our flow on 25 large PTnet specifications, describing asynchronous control circuits, and contrast our results to the popular Petrify tool for PTnet state space exploration and circuit implementation. Our results indicate a very significant reduction in both state space size and execution time.
  • Keywords
    Petri nets; asynchronous circuits; computational complexity; finite state machines; formal specification; PTnet control model; PTnet specification; PTnet state space exploration; Petrify tool; asynchronous control circuit; compact interacting FSM model; finite state machine; free-choice PTnet; free-choice Petri-nets; hardware application; implementation model; monolithic FSM implementation method; monolithic FSM model; multiple synchronised FSM; polynomial complexity flow; polynomial time flow; software application; specification model; state-based FSM model; Complexity theory; Concurrent computing; Integrated circuit modeling; Polynomials; Silicon; Software; Synchronization;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Design (ICCD), 2012 IEEE 30th International Conference on
  • Conference_Location
    Montreal, QC
  • ISSN
    1063-6404
  • Print_ISBN
    978-1-4673-3051-0
  • Type

    conf

  • DOI
    10.1109/ICCD.2012.6378645
  • Filename
    6378645